Article 3316

Title of the article

ARITHMETIC LOGIC MODULES FOR MULTIPLICATION OF LARGE NUMBERS

Authors

Fedyunin Roman Nikolaevich, Candidate of engineering sciences, associate professor, sub-department of computer engineering, Penza State University (40 Krasnaya street, Penza, Russia), frn_penza@mail.ru

Index UDK

004.272.42

DOI

10.21685/2072-3059-2016-3-3

Abstract

Background. Ways to implement functional units that process large numbers for specialized arithmetic and logic units (ALU) have been the actual direction of re-search over the past twenty years. The need for these types of design units arises from the fact that the range of numbers used in real applications is sometimes up to several hundreds and even thousands of decimal digits. This range of numbers does not correspond to the basic data types of modern ALU architectures.
Materials and methods. Research and implementation of ALU functional units were based on the formalism of the theory of nondeterministic automata, followed by functional simulation of ALU functional units in the ALTERA QUARTUS CAD. The authors used the algorithm of long numbers multiplication (the Karatsuba algo-rithm) as the main algorithm of research and unit implementation.
Results. The researcher described the soft-processor in detail, on the basis of which the functioning of the large numbers multiplication unit was planned. The au-thor obtained a model of the large numbers multiplication unit, based on the theory of non-deterministic automata. The article suggests a system of canonical equations based on the mathematical model of the multiplication algorithm. The researcher has designed a circuit of the functional multiplication unit with subsequent modeling in the Altera Quartus CAD.
Conclusions. The article suggests a method of implementation of functional units for large numbers multiplication. The theory of nondeterministic automata was used implement the function multiplication unit model. The author mathematically described and then functionally designed the multiplication device at the soft-processor level.

Key words

soft-processor, function multiplication unit, large numbers, Karatsuba algorithm, Altera Quartus CAD.

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References

1. Available at: https://www.altera.com/
2. Karatsuba E. A. Bystrye algoritmy i metod BVE [Fast algorithms and the FEE method]. Moscow: Vil'yams, 2008, 341 p.
3. Vashkevich N. P. Nedeterminirovannye avtomaty v proektirovanii sistem parallel'noy obrabotki: ucheb. posobie [Non-deterministic automata in parallel processing system design]. Penza: Izd-vo PGU, 2004, 280 p.
4. Vashkevich N. P., Biktashev R. A., Tarakanov A. A. Izvestiya vysshikh uchebnykh zavedeniy. Povolzhskiy region. Tekhnicheskie nauki [University proceedings. Volga region. Engineering sciences].2007,no.4,pp.98–106.
5. Fedyunin R. N. Izvestiya vysshikh uchebnykh zavedeniy. Povolzhskiy region. Tekhnicheskie nauki [University proceedings. Volga region. Engineering sciences]. 2007, no. 2, pp. 32–41.
6. Fedyunin R. N. Izvestiya vysshikh uchebnykh zavedeniy. Povolzhskiy region. Tekhnich-eskie nauki [University proceedings. Volga region. Engineering sciences]. 2013, no. 2 (26), pp. 15–22.

 

Дата создания: 07.02.2017 15:18
Дата обновления: 08.02.2017 08:28